What is in this article?:
- Single Board Captures, Digitizes DC to 6 GHz
- Front-End Flexibility
A single-board signal-capture system records signals across an analog bandwidth of 8 GHz with high resolution.
Capturing and digitizing broad swaths of spectrum is now an essential function in many defense-electronic systems. Because of the large amount of digital processing now performed in many systems, platforms ranging from electronic-intelligence (ELINT) and signal-intelligence (SIGINT) to radar and electronic-warfare (EW) systems can all benefit from fast digitizers with broad, instantaneous bandwidths. The CHAMP-WB-DRFM OpenVPX board from Curtiss-Wright in partnership with Tektronix Component Solutions is the first product to address this challenge at the board level.
This new offering uses an analog-to-digital converter (ADC) from Tektronix that samples at 12 GSamples/s to digitize a bandwidth of 6 GHz. This single-board solution also features a 12-GSamples/s digital-to-analog converter (DAC)at its output, and a Virtex-7 field-programmable gate array (FPGA) from Xilinx that can receive or source data at 12 GSamples/s.
The CHAMP-WB-DRFM VPX board consists of Curtiss-Wright’s CHAMP-WB baseboard that contains the FPGA supported by 8 GB of DDR3L SDRAM and the TADF-4300 Enhanced FMC mezzanine card that contains the ADC and DAC that together form the CHAMP-WB-DRFM (see table). As the 6-GHz bandwidth of the CHAMP-WB-DRFM (Fig.1) is nearly three times that of its nearest board-level competitor, it offers possibilities unavailable before. For example, EW, SIGINT, ELINT, and other surveillance systems must scan over a broad range of frequencies, so this capability to bridge the gap between the analog signal from the antenna and the point at which it enters the digital domain, without requiring a frequency downconverter for input frequencies to 6 GHz, helps reduce the size, weight, power consumption, and overall complexity of the receive path.
Such capability can also be useful in measurement applications such as radar test ranges where it can capture and externally store information from multiple “fly-bys” using the 200 Gb/s of available backplane bandwidth. These tests are performed to judge the performance of an aircraft’s radar, radar warning receiver(RWR), or EW system during multiple passes through the test range while being subjected to threats transmitted from the ground. Spectrum management and long-term surveillance are other applications in which hardware required to continuously capture a broad region of spectrum and analyze the results can be dramatically reduced.
Using the CHAMP-WB-DRFM as the core conversion and processing portion of a digital RF memory (DRFM) in a fighter aircraft as an example, the analog signal from an antenna or downconverter is directly digitized by the ADC on the TADF-4300 and sent via LVDS to the FPGA. Customer-supplied algorithms resident in the FPGA then scour the wideband signal capture stream to find the comparatively narrowband signals from an enemy radar.
If such signals are found, the FPGA performs the signal processing tasks required to confuse the radar, drawing on a threat library or other data stored in the synchronous dynamic random-access memory (SDRAM) on the CHAMP-WB-DRFM board. The output of the FPGA, which is a modified version of the original input stream, is sent back to the TADF-4300 where it is reconverted to analog form and then sent off-board to an upconverter, transmitter, and antenna.